MemLoad (MemStore) are the maximum number of Load (Store) operations that the compiler is permitted to issue in the same instruction for the entire VEX target (all clusters)
Memory.<n> is the maximum number of memory (Loads or Store) operations that the compiler is permitted to issue in the same instruction for cluster <n>
So, in general it makes sense to define architectures where (foreach <n>)
MemLoad >= Memory.<n> or MemStore >= Memory.<n>
The number of memory ports for a cluster <n> is Memory.<n>, because that is the maximum number of memory operations that can be issued. If you share a single cache across all clusters (numCache=1), you need that many ports per cluster. So, the total number of read ports (for numCaches=1) is
min (MemLoad, Memory.0 + Memory.1 + Memory.2 + Memory.3)
for a 4-cluster machine (and you can work out the other cases).
For example, let's say we have a 4-cluster machine, with Memory.<n>=2 and MemLoad = 6. The number of memory ports in this case is 6, and we can issue 2 memory ops per cycle in each cluster (but up to a maximum of 3 clusters). And so on.
-- Paolo